Quad flat packages are one example of surface mount integrated circuit package, in which gull wing leads extend from each of the four sides of the package. A modification which is aimed at providing improved miniaturisation, and which has been proposed for sensor packages, is a so-called Heatsink Very-thin Quad Flat-pack No-leads package (HVQFN). This is a package with no component leads extending from the package, and in which the package includes an integrated heat sink part. The package is for mounting on a printed circuit board by soldering, with other surface mount devices.
FIG. 1(a) shows a HVQFN package for soldering onto a PCB. The sensor chip 10 has pads 11 around the outer region of the top surface. In one example these pads connect to bond wires 14 which extend down to a carrier 12 such as a lead frame, which provides a fan out function. The bond wires are embedded in the package. The bond wires are connected by means of wirebonding. This is usually a “cold welding” process in the sense that the materials that are joined are not brought into the liquid state (as in real welding and soldering processes). A metallization is present on the bond pads when an IC is intended for wirebonding, and this is often aluminum or gold.
The lead frame 12 has outer contacts which are soldered to an underlying PCB 13, and a central die pad area beneath the chip 10. The central die pad area is also soldered to the PCB, and this solder region performs a heat sink function.
Instead of a lead frame, the carrier can for example be a laminate substrate.
The chip 10 carries one or more sensor elements 16. A HVQFN cavity package allows for the sensors on the chip to have an open access to the environment by providing package encapsulation with an opening through which the sensor area is exposed.
FIG. 1(b) shows a sensor chip with solder bumps 18 on the pads 11 which could be used to enable the chip to be mounted directly onto a PCB. A disadvantage of the package of FIG. 1(a) is that the package size is relatively large compared to the die size, as represented by arrows 20.
It is clear that a chip scale package (CSP) would be preferred from a size and cost point of view, for example by directly soldering the chip to a PCB.
However, the disadvantage of this approach for sensors is the risk of contamination from the CSP process, in particular the risk of solder splatter when solder bumps are reflow soldered when those solder bumps are attached at the wafer level, but also during the board soldering process at the customer side which might pollute the sensor area, and affect its functionality.
FIGS. 2 and 3 are used to illustrate the problems of soldering the chip directly to a PCB.
FIG. 2 shows how the sensor element 16 can be polluted by the CSP process when being prepared for soldering to a PCB, in particular when forming the solder balls 18. The process starts with a wafer, on which the bond pads 11 are formed, followed by an under bump metallisation. The solder balls are applied by a reflow process, which can give rise to the pollutant shown as 22.
The resulting package is then soldered at the customer side (i.e. a producer of electronic circuits rather than the individual components) to a PCB 13. The designer of the chip cannot know what level of cleaning will be applied at this stage, nor the quality of the solder paste and other materials used.
FIG. 3 shows how the sensor element 16 can be polluted by the solder reflow process when the package is mounted on the customer circuit board 13. The pollutant is shown as 26.
There is therefore a need for a sensor package which protects the sensor elements but which uses less space than the wire bond package of FIG. 1(a).